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Thanks uilka_b for replying. Yes I agree with you, I did not see the need for the CPS but when I remove it and go directly from the Frame Reader to the CVO it does not work. QSYS is happy
but it does not work. From what I can see, the CPS receives 4 bytes of which only 3 are needed (23:0 = RGB) and the 4th one (31:24) is discarded. I would love to get rid of it, what am I missing? Again, if I go directly from the Frame Reader to the CVO 3 color planes all the way things don't work, I don't get any license warning and no "time limited" .sof. But it does not work. Can someone explain this?
The SD card controller from TERASIC simply uses 3 PIOs and some SW - don't need Altera's IP.
Thanks,
Guys
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It is strange that the Frame reader generates 4 bytes. You can specify in the Frame Reader GUI to generate 3 color planes (in sequence or parallel), so it will be 3*8=24.
Usually to test your VIP design step-by-step first you create just a simple Test Pattern-> CVO path to test your CVO. Next step is to add your FR + Test Pattern as a second channel through the Mixer to CVO when you can enable and disable Mixer layers and change your FR settings on the fly to find the best settings.
Regarding Terasic SD card controller..... if it just 3 Altera PIO blocks getting Altera_UP_SD_Card_Memory_Block.qip error message is too strange. Are you sure you know what you are doing?
Good luck
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