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Altera_Forum
Honored Contributor
17 years agoVIP Clocked Video Input Seperate Sync Timing Tolerance
Hello All, - I'm running analog video to a TI TVP7002, which decodes it into 24 bit digital clocked video with seperate syncs. My output is a vanilla parallel TTL interface SVGA LCD. Plan is to...
Altera_Forum
Honored Contributor
17 years agoI have just looped back the LCD output from the SoPC to the input, and made an ad-hoc signal generator with a 24 bit binary counter. this is giving me a signal. this would indicate that I do indeed have a problem with my input signals not meeting the requirements of the vip.