Forum Discussion
Altera_Forum
Honored Contributor
16 years agoYou could report it. The big problem I see is the clock instability. Altera could perhaps do something to improve the reliability in a situation where the input clock is unstable (which seems like it could be common in video designs).
It seems to me the fix to would be to reset the core whenever the video locked signal is deasserted. Writing your own version is a reasonable amount of work. I wish I could give you mine but it was written on company time. I may be able to give you the block which does the control packet insertion. I'll look into it. Jake