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Altera_Forum
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17 years ago

VIP Clocked Video Input Malfunction?

Hi, I am experiencing problems with the VIP clocked video input core and would like to know if anybody has seen similar issues. I use the core to receive various video formats - from SD seria...
Altera_Forum's avatar
Altera_Forum
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17 years ago

Hi Jake,

Thanks for letting me know about the signaltap. Now I just have to see if it will fit into my FPGA (which is already 90% full and takes 40 minutes to compile on my slow laptop!).

Your suggestion for adding a small FIFO is an excellent suggestion. Thanks! I have started writing my own clocked video input, and might finish it just for the fun of it, but your suggestion will be easier and faster!

Regards,

Niki