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Altera_Forum
Honored Contributor
Honored ContributorVIP - Frame Buffer, SDRAM and Bridges
Hello All, I'm trying to correct some intermittent behaviour in my video application. I think I've got timing issues around my DRAM. I'm using a frame buffer to all different video frame rates ...
Altera_ForumHonored Contributor
Honored ContributorYou're not that confused. :)
Q1: In your case, directly Q2: Yes, it will be redundant. It doesn't make much sense to say that the FB component is a bridge but otherwise your reasoning is correct: - In a SOPC with just 2 masters and 1 slave, there is nothing to gain by inserting a pipeline bridge. - Since the FB component can use different clocks for the -ST and the -MM interfaces, you don't need a dual clock bridge. Q3: Correct. Q4: Don't know, actually.
