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Altera_Forum
Honored Contributor
15 years agoVHDL Use Clause Error
Hi, When I try to compile in Signal Compiler I get the error: "Error (10481): VHDL Use Clause error at FIRFilter_FIRSubBlock2_AddSubsystem.vhd(28): design library "fpc" does not contain prim...
Altera_Forum
Honored Contributor
15 years agoHi dabuk,
You're awesome, thank you so much for your reply! So far the tcl files work great. Best Regards, rushale