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Altera_Forum
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9 years ago

Verification on application of FFT ip core

I'm working on an application that involves using an FFT of an analog signal. I am using the Cyclone V starter kit. To clarify, the analog signal is fed into on-board ADC and generates a 12-bit...
Altera_Forum's avatar
Altera_Forum
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9 years ago

12bits input to fft requires fft input to be 12 bits (not more).

Your fft output is both real and imaginary and choose the width you need. you will need scaling if you use Altera's block floating point architecture.

you will need define start/end of frame and valid signals