Variable Streaming FFT/IFFT Core in SOPC Builder

Hi folks,

I have a principal question on using the FFT Megacorefunction in SOPC-Builder.

At first => I already read the posts regarding FFT and SOPC but they did not address my issue.

I want to use a variable streaming FFT core (as IFFT too) as a co-processing core in my NIOS, memory mapped, system.

My idea to perform this is:

1. Generate the core with the megawizard

2. Write a wrapper, because the streaming interface allows single data only, but the FFT core has 2 (real and imaginary part) => simply a vector concatenation. AND I have to write a Memory Mapped Slave on my own for configuring the variable length and the bit for forward and inverse transform.

3. Create the component in the SOPC Builder with one streaming and one memory mapped slave interface

4. => now there is the question how to do the next steps: the input data needs to be transferred from an external memory to the FFT core and then (after some delay) directly transferred back to another (or maybe the same) memory location.

My idea: Using a SGDMA for the write side (memory to streaming) and one SGDMA for the read side of the FFT (streaming to memory). In software, after initializing the two SGDMA descriptors, I first start the SGDMA used for the FFT output (because it will wait anyway for a SOP from the FFT core) and then I start the SGDMA for the input side of the core.

Would this solution work, because just trying it takes many days of work?

Can any Altera expert give me a hint?

kind regards,

Emanuel