Altera_ForumHonored Contributor14 years agoUsing signed binary fractional (SBF) in HIL Hello! In my hardwar-in-loop (HIL) design, I am trying to give input in signed binary fractional (SBF) format, which is one of the options ( also provided for IOs), available at function level....Show More
Altera_ForumHonored Contributor14 years agoThank you sir... great!!! dunno why couldn't recognize before.... once again thank you!!!
Recent DiscussionsCan't generate F-Tile Ethernet Hard IP Design ExampleAgilex 7 slew rate reconfigurationConstraints not being picked for DCFIFOCyclone 10 GX IBIS-AMI modelsF-Tile Ethernet Hard IP (100G)