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I'm wondering if there is a way to utilize DSP blocks for CRC calculation.
Typically, parallel or serial CRC is implemented as XOR trees. But perhaps there is an algorithm to do it with adders and multipliers.
My designs have multiple CRC32 with 512- and 1024-bit datapaths, running at 250MHz and higher speeds. They consume huge amounts of logic and very tight on meeting timing. Whereas lots of FPGA DSP blocks are sitting unused.
Thanks,
Evgeni
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CRC is a simple XORing bits it has to be computed using XOR this is fastest way to do it , DSP Blocks handle min 8-bits of data being added and multiplied .
Where as in CRC you have to do that 1-bit at a time .
Ahmed Asim Ghouri
Embedded Strings inc
Website :
www.emstrings.com (
http://www.emstrings.com)
Email :
support@emstrings.com
Honored Contributor
