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Altera_Forum
Honored Contributor
Honored ContributorUsing Arria 10 Transceiver native PHY IP core
Hi! I recently bought Arria 10 SoC dev kit. I try to transfer data via SFP+ and loopback through fiber cable, with data rate 1.25Gbps. I use Arria 10 Transceiver PHY IP to perform this task. I...
Altera_ForumHonored Contributor
Honored ContributorDoes anyone know about this problem ? please, consultants help me !
In my design i use : Transceiver native PHY IP core; Transceiver native PHY Reset Controller; ATX PLL. At first i thought the problem was Analog Parameter Settings. But I used Transceiver Toolkit to get the optimal PMA settings for the transceiver for the best bit error rate and reliability. After many compiling i think my problem is something not quite right in my PCS or design in the core or in the transition between the two. Here is my design:
