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Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

UPSAMPLING BLOCK Problem

Hi guys, has anyone experiences with the DSP Builder "UPSAMPLING BLOCK" ??? I want to use it but there is one big Problem: The Up Sampling block increases the output sample rate from the input...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

try this:

The important thing is to keep data coming in at reduced rate

signal count :integer range 0 to 4:= 0;

in a clked process

if(count = 4) then

count <= 0;

enable <= '1';

else

count <= count + 1;

enable <= '0';

endif;

if(enable = '1') then

data_out <= data_in;

endif;