UniPHY DDR3 simulation is slow

Hi all!

May I know where to check "calib_skip_steps" from the example link ted gave:(e.g. sim:/x_ddr3_tb/x_ddr3_inst/mem_if_ddr3_emif_0/p0/calib_skip_steps")?

My DDR3 UniPHY design is very basic with read and write operation. I use generated example design for simulation.

For my case, I choose skip calibration mode and also disable the EMIF On-Chip Debug Toolkit in Diagnostics tab of the UniPHY-based controller MegaWizard GUI. However, my overall simulation time take atmost 1 hour.

By the way, I also found Transcript from ModelSim state that:

Code:

# ** Warning: Design size of 17487 statements exceeds ModelSim Altera Starter recommended capacity.# Expect performance to be adversely affected.

Is this really mean that fully purchase of ModelSim Altera can solve this issue? I would like to fasten the simulation as fast as possible like urs.

Thanks!