Forum Discussion
Altera_Forum
Honored Contributor
15 years agoUndesired (incorrect?) behavour of CVI AV-ST output
Hi, I have a video stream (BT1120) entering an FPGA through the CVI. The stream can be interrupted at any time (someone pulling out the plug). I have an internally generated "blue-screen" that...
Altera_Forum
Honored Contributor
15 years agoHello again,
I did a quick simulation: CVI -> CVO both at PAL. The result is different then yours, as Lock signal goes low there is EOP. See image "eop". But I think that about a year ago I was working on a product and I had the same problem as you have. I could not use the Switch because the Lock signal going down ended in a deadlock. I do not remember the VIP version I was working on but this simulation is with 10.1. Can you try the 10.1? If not I can try to send you the *.vho of the CVI and CVO I am using for the simulation. BR,