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h3l1um
Occasional Contributor
Occasional ContributorUnable to generate AXI Streaming Intel FPGA IP for PCIe Example design for F-Tile FPGA Agilex 7 R24C
Hello Team, I am trying to generate an example design for the AXI Streaming Intel FPGA IP for PCI Express IP. It supports F-Tile PCIe in the design, but when trying to generate the Example design a...
In Q24.1 the design example generation is only for P-Tile and R-Tile.
You can simply instantiate one IP in your project or copy that IP from your previous project.
Regards,
Rong
RongY_altera
Contributor
ContributorIn Q24.1 the design example generation is only for P-Tile and R-Tile.
You can simply instantiate one IP in your project or copy that IP from your previous project.
Regards,
Rong
FPGA_MozartNew Contributor
Hi Rong,
It is alright. I wanted to generate the example design to Validate AXI Streaming Intel FPGA IP for PCI Express in my device.
But it is alright. I will use the previous project on this device.
You can close this case now.
Thank you,
Best Regards.
