UART IP - input clock

Hello,

I'm using a MAX10 FPGA and I'm trying to generate a UART IP core. During the generation process, after I select the buad rate, stop, parity bits, I get an error "the input clock frequency must be known at generation time". This error makes sense. But how do I set the clock frequency? I've looked though various menus, and did not find anything.

Thank you.

Alin