Forum Discussion
Altera_Forum
Honored Contributor
11 years agoHi Guys, I add my own custom hardware design to this system on the tutorial.(Altera JTAG-to-Avalon-MM Tutorial)(http://www.alteraforum.com/forum/showthread.php?t=34787)
but my hardware which i successfully tested it last time by DE2 board has this input and outputs: https://www.alteraforum.com/forum/attachment.php?attachmentid=10027 last time i communicate with my accelerator through NIOS in this way: # ifndef GCD_FW_H_ # define GCD_FW_H_ # include "system.h" # include "altera_avalon_pio_regs.h" # ifndef reg_gcd_status # define reg_gcd_status 0x0 //Register Offset = 0, control/status register # endif # ifndef reg_gcd_control # define reg_gcd_control 0x1 //Register Offset = 1, MSW input register # endif # ifndef reg_gcd_input1 # define reg_gcd_input1 0x2 //Register Offset = 2, MSW-1 input register # endif # ifndef reg_gcd_input2 # define reg_gcd_input2 0x3 //Register Offset = 3, MSW-2 input register # endif # ifndef reg_gcd_output # define reg_gcd_output 0x4 //Register Offset = 4, MSW-3 input register # endif enum { np_gcdcontrol_reset_mask = (1<<1), //reset the GCD coprocessor np_gcdcontrol_enable_mask = (1), // perform gcd computation np_gcdcontrol_clear_mask = 0, // clear the control signals np_gcdstatus_done_bit = (1), //GCD has finish computation }; /* prototypes */ unsigned long GCD_FW (unsigned long in1, unsigned long in2); # endif /*GCD_FW_H_*/ ///////////////////////////////////////////////////////////////////////// # include "system.h" # include "altera_avalon_pio_regs.h" # include "GCD_FW.h" unsigned long GCD_FW (unsigned long in1, unsigned long in2) { // Reset the 32-bit GCD Calculator unsigned long output = 0; // De-aseert the reset signal to ready computation IOWR(GCD_0_BASE, reg_gcd_control, np_gcdcontrol_reset_mask); // Keep looping if ready signal not yet asserted //IOWR(GCD_0_BASE, reg_gcd_control, np_gcdcontrol_clear_mask); //while (np_gcdstatus_done_bit != IORD(GCD_0_BASE,reg_gcd_status) ); // Send 1st random number to GCD IOWR(GCD_0_BASE, reg_gcd_input1, in1); // Send 2nd random number to GCD IOWR(GCD_0_BASE, reg_gcd_input2, in2); // Aseert the GCD enable signal to start calculation IOWR(GCD_0_BASE, reg_gcd_control, np_gcdcontrol_enable_mask); // Keep waiting if the computation not yet completed while (IORD(GCD_0_BASE,reg_gcd_status)==0 ); // Read the GCD output output = IORD(GCD_0_BASE,reg_gcd_output); // De-assert the enable signal for next set computation IOWR(GCD_0_BASE, reg_gcd_control, np_gcdcontrol_clear_mask); return output; } But now I dont know how to talk to my hardware through "avalon_write" syntax since i dont access the HW I/O directly(input clk, reset; input chipselect; input [2:0] address; input write; input [31:0] writedata; output [31:0] readdata; ) regards