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I understand the BFM is strictly for simulation/verification, but isn't the simulation mechanism for the JTAG-to-Avalon-MM you 'found', also meant for testing the system before actually synthesizing to hardware? If so, is it that the BFM simulation is more exhaustive in coverage than the coverage in JTAG-To-Avalon-MM?
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Its likely the JTAG-to-Avalon-MM stuff was put there for testing by someone, but its undocumented, and does not exist for the VHDL version of the component. Ideally Altera would provide testing hooks into all of their JTAG code, but they do not. The difference between testing with the BFM and with the JTAG-to-Avalon-MM bridge is that you are generating Avalon-MM transactions differently. The BFM can generate a much richer set of transactions and so is more useful for testing your custom Avalon-MM components before you use them.
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even though it's not one of the targeted boards, I thought I'd give all this a try on my oldy DE1 (Cyclone II) board
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The instructions are board-agnostic. I don't have a DE1 (so can't test your code), but the procedure works fine on every board I've tried. Which version of Quartus are you using? (Perhaps something has been broken).
Did your simulation work ok?
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As another data point I thought I'd try using the command line tool quartus_stp, but this seems to open SignalTap... not an interactive shell.
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You should be able to use quartus_stp -t (or is it -s?) to start the shell. But in that case you need to use a different set of Tcl procedures to access the hardware (the script is in the zip).
Check your simulation first, and if its ok, let me know what version of Quartus you used and I'll do a hardware check with the BeMicro-SDK or DE0-nano.
Cheers,
Dave
Honored Contributor
