Thank you very much for this tutorial. It got me pretty far. However, I did this in Quartus II 13.0 sp1 and there are some differences, two of which result in errors. I didn't go through the SOPC Builder chapter since that tool isn't available anymore.
- There are 33 warnings, not 3, when generating the Verilog files in Qsys. These are all Warning: qsys_system: "No matching role found for rst_controller:reset_out:reset_req (reset_req)". According to support solution spr371633 (http://www.altera.com/support/kdb/solutions/spr371633.html), these can be ignored.
- The logic element counts are different (e.g. 1106 at the top level, not 1058). I suppose Altera changed the library components.
- The Quartus II Handbook is different (e.g. the system console commands in table 10-3 mentioned in section 5.1 is on pages 10-9 through 10-11 of version 13.0 of the handbook).
- When compiling the simulations, the vlog command's -L argument that worked for me is libraries/altera_avalon_vip_pkgs_lib, not qsys_system_bfm_master.
- $TUTORIAL/hdl/qsys_system/scripts/sim.tcl contains the above error.
Section 4.5.1 talks about generating the code but I almost didn't do it because that discussion is formatted as regular text. All of the other directions are given in a list format.
The tutorial says nothing about how to use Quartus II to program the device. Perhaps you can add something about programming?
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