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Altera_Forum's avatar
Altera_Forum
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15 years ago

TSE-SGDMA something wrong

Hi all, I'm working on a custom board with nios2 + tse (10/100/1000) + DDR sdram... I'm trying to use a driver for triple speed eth under u-boot...the driver has been already tested on an altera...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

Hi,

I created a SDC file for the PHY DP83848C some time ago. Maybe this file helps you out a little bit.

Like I understood it is necessary to create the TX and RX Clock in the SDC. After that you have to define which Pins are synchronus to these Clocks.