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Altera_Forum's avatar
Altera_Forum
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15 years ago

TSE-SGDMA something wrong

Hi all, I'm working on a custom board with nios2 + tse (10/100/1000) + DDR sdram... I'm trying to use a driver for triple speed eth under u-boot...the driver has been already tested on an altera...
Altera_Forum's avatar
Altera_Forum
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15 years ago

Ok...the problem is PHY clock....with the over mentioned change now I usually see the complete packet without any problem....anyway sometimes the error comes back again...not in the head (first byte) but in the tail (last byte) especially with big packets....

Now I understand that problem is there...it only need to correctly center phy clock....

Daixiwen and the others....which is the best way to regenerate this clock???

Thanx

Carlo