Forum Discussion
Altera_Forum
Honored Contributor
15 years agoI return on this old post because I discovered the above problem is still present in some situations.
I hope Daixiwen or other Altera Gurus have any hints for me. I think the problem is not with mac or phy, but with dma. Infact I switched from TSE to opencores mac and I have exactly the same behaviour. I can reproduce in a deterministic way a condition where the tx frame gets corrupted if a rx frame is received in the same time. Here is more exaclty what I see: I monitor txen and txd signals that drive the phy, and crs or mac_rxdv for identifying rx frame timing. Tx frame is about 400bytes long (txen pulse about 32us). Rx frame starts being received a few us after txen rising edge. On most cases txen length is correct; same for data on txd. While in many cases I see corrupted data on txd, as if it has been overwritten with rx data. In consequence of this, also the txen pulse becomes lenghtened or shortened. As I said in previous posts this only happens if I have rx data. I checked the mac txclk, too, but it's perfectly in phase and it doesn't miss any cycle. I remarked that the first 240-270 bytes of the tx frame are ALWAYS correct: the data corruption always happen from a random position AFTER this threshold. I don't know the dma descriptors inner workings; probably 256bytes is the size of a single descriptor? So I suppose I have some problem with descriptor chaining. Please help. Thank you in advance for any support