Forum Discussion
Altera_Forum
Honored Contributor
15 years agoTSE IP issue when downloading software application on NIOSII
Hi, I have a Stratix3 DSP development Kit based on EP3SL150F1152C2N FPGA. I use the Triple Speed Ethernet MegaCore ( 10/100/1000Mb Ethernet MAC with 1000 base-X/SGMII PCS). When I load the des...
Altera_Forum
Honored Contributor
15 years agoNow I'm confused... Are you using the reference design or your own project? Do you have the same problem with the CPU not responding when using the reference design?
It seems that the reference design is using a RGMII interface instead. It could be easier to debug. The Altera driver already has all the required function to initialize the MAC and they should work for all kind of interfaces to the PHY.