Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

TSE IP issue when downloading software application on NIOSII

Hi, I have a Stratix3 DSP development Kit based on EP3SL150F1152C2N FPGA. I use the Triple Speed Ethernet MegaCore ( 10/100/1000Mb Ethernet MAC with 1000 base-X/SGMII PCS). When I load the des...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

Does your design meet all the timing requirements? Check also that your clock signals and pll configurations are ok.