Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

tse ip core communicate with pc

hi, I instantiate the tse ip core with configuration of 10,100/1000Mb mac and RGMII interface in my project to communicate with pc,then initialize the register space of mac with the recommended ini...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

Usually when the TSE doesn't clear its reset flag, it means that some clocks are missing on the interface with the PHY. Check that the TSE is receiving correct rx and tx clocks on its RGMII interface.