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Honored Contributor
Honored ContributorTSE in SGMII Mode with external FIFO and PLL for PCS Ref Clock
Hi everybody, I try to use the Altera TSE in SGMII Mode with external FIFO. My board is a SoCKit. I need a 125 MHz signal for the pcs_ref_clk and want to keep it simple and do not change the SI533...
Altera_ForumHonored Contributor
Honored ContributorI was in contact with Terasic and I solved the problem by reconfiguring the SI5338Q. I set the hsmc_ref_clk to 125MHz, so there is no need anymore for a PLL.
