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Honored Contributor
Honored ContributorTSE in SGMII Mode with external FIFO and PLL for PCS Ref Clock
Hi everybody, I try to use the Altera TSE in SGMII Mode with external FIFO. My board is a SoCKit. I need a 125 MHz signal for the pcs_ref_clk and want to keep it simple and do not change the SI533...
Altera_ForumHonored Contributor
Honored ContributorNo, I made no set up for the SI5338Q. The default (on SoCKit) is that all four clocks are enabled.
Pin P9 is right and I/O standard is HCSL. However, I still try to find out if there is a PLL on the board to solve my problem
