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Altera_Forum
Honored Contributor
13 years agoTSE (Ethernet) - Core does not transmit data on RGMII TX, rest works perfectly fine
Hi all, I am facing a problem that I don't fully understand. I have an instantiation of the TSE core that I integrated into my application. In simulation everything (Receiving and Sending) work...
Altera_Forum
Honored Contributor
13 years ago --- Quote Start --- It can be a timing problem on the RGMII pins too. If you set the PHY in loopback mode, you can at least check that you receive back on the RGMII pins the same packets than those you send. If they are identical, then the timing is probably right. --- Quote End --- Note also that there are options in the Marvell 88E1111 which determine the phase delay of the source synchronous capture clocks tx and rx paths which can be set over MDIO. One has to sign a non disclosure with Marvell to see the details.