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Hi Arly,
1. Be advised that standard TSE MAC core works in Evaluation mode - works only for 1 hou after FPGA is programmed. To have full version, you need to purchase the license.
2. At this point, use PC to receive data. We've been using WireShark - I think it's free. You may have few issues:
a. source and destination MAC address. double check it.
b. Tx timing constraints. once I put the 90 degree shifted Pll output, we transmitted our first packets. However, relieble transmission was only with fully set constraints.
refer to "AN 477: Designing RGMII Interfaces with FPGAs and HardCopy ASICs"
c. Wireshark can receive packets even if your MAC addresses are corrupted (we had this issue), but the TSE will not receive it unless you configure in in Promiscuous mode (a bit in configuration register located at 0x02 address)
As for initialization, we used self-written core instead of NIOS processor. If your counter aFramesTransmittedOk is working ok and incrementing with every send packet - your core is TOTALLY FINE.
Pay attention to 1. the proper connection of PHY lines 2. Proper clock to PHY 3. Timing constraints
And you also can use SignalTap to see output activity on RGMII port - see the post of Kkaibara ahead - it helped a lot. Once you send a packet, you can see it appear on GMII output data lines (0..7)
Hope it helps.
Alex
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Hi Alex,
Your information was really helpful!!! I followed your advice and I went through the document "AN 477: Designing RGMII Interfaces with FPGAs and HardCopy ASICs" and I understood (among other things) why and which clock should have the 90 degree delay. Now, everything is working perfectly. I can switch on and switch off LEDs and control different components of one board from another board sending frames through the Ethernet port .
Thank you so so much!!!
Best regards,
Arly
Honored Contributor
