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P.S. I just went through a nightmare of an experience debugging a VSC8221 PHY with the TSE MAC a few months ago. Turned out to be an issue with the PHY's onchip 1.2V regulator. but let's hope that's not the case for you.
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Dear Jake!
I am writing you to ask for help with debug VSC8221.
We use VSC8221+ HX5004NL with Xilinx Kintex-7.
VSC8221 work without EEPROM, with TTL generator 25 MHz (PLLMODE left floating, OSCDIS = GND, XTAL2 left floating) and internal 1.2V regulator is used (REGEN = VDD33A).
MDC and MDIO connect to axi_ethernet (MAC on Kintex-7, (ds759_axi_ethernet)) and we can read/write VSC8221 registers.
JTAG we do not use (TRST = DGND).
CMODE have next configuration:
CMODE0 -> 0 -> VDD33A
CMODE1 -> 4.02 k -> VDD33A
CMODE2 -> 22.6 k -> VDD33A
CMODE3 -> 0 -> VDD33A
We tested far-end loopback (Register 23 (17h), bit 3), WireShark show that loopback work fine. Link-up and ping packets go back without lost.
After power-up and low-to-high transition of the NRESET pin no link-up.
REF_FILT pin = 1,2V
REF_REXT pin = 1V
Copper pair A and B = 1,65V
CLKOUT = 125MHz, but clock has bad form.
What may be wrong in our design?
May be, we have to assert PLLMODE or use external 1.2V power generator?
We see that auto-negotiation test pulses come from link partner, but read from Register 1 (01h), bit 5 show that auto-negotiation not complete.
Restart auto-negotiation (Register 0 (00h), bit 9) do not help.
We think that problem with link partner, but when we use Xilinx board ML605 with Marvell 88E1111 link-up with our link partner.
May be, problem with initialization?
Does we have to write "Required PHY Register Write Sequence" (VSC8221 Data Sheet, page 126) every time when power-up VSC8221?
We try, but it does not help.
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P.S. I just went through a nightmare of an experience debugging a VSC8221 PHY with the TSE MAC a few months ago. Turned out to be an issue with the PHY's onchip 1.2V regulator. but let's hope that's not the case for you.
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If you have some time, write your thoughts about our problem.
Regards,
Abramov Egor.
Honored Contributor
