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This should be a no-brainer. At some point you should seriously consider figuring out what the simulation problems are. That's the easiest way to resolve issues like this.
Can you attach the .qip file for the RAM and the source file where you instantiate it?
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You're right, I should have done that from the start. I took the time to get it working correctly, and have verified that in simulation the data is written to memory and read out later on in RTL simulation. Timing simulation is not available on the device I'm using (Cyclone III). I've attached the .qip file (with an added .txt extension so I could upload) and the source file that instantiates it.
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