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Altera_Forum
Honored Contributor
Honored ContributorTristate Bridge between 32-bit and 16-bit data bus
Hello all! I am trying to write some data to an external 16-bit MRAM memory. This MRAM memory has a tristate data bus, so in my SOPC system, the CPU connects to an Avalon-MM Tristate Bridge, th...
Altera_ForumHonored Contributor
Honored ContributorSorry, I made some mistakes in my first post. Actually, when the CPU performs a 32-bit write request, two 16-bit write requests are performed by the tristate bridge. The issue occurs when a custom component performs a 32-bit write request to the MRAM. In this case, only one 16-bit write request is performed by the tristate bridge.
Do you know why?
