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Hello,
I am new to ethernet interfacing so finding it very difficult to use TSE MAC core in my design. I have generated the TSE MAC core from mega wizard for 10/100/1000 MBPS ethernet MAC. Now I have got one VHDL file for this TSE MAC core component but I am not able to use it because I don't have any reference design or any application note. I don't know how to use these rx and tx fifo signals, control signals, clock and reset signals and MDIO signals and RGMII interface signals. I am using Cyclone 3 development board and there I checked for connections between FPGA and PHY chip, it is RGMII only. I don't want to use Nios II processor now to communicate with other ethernet node. Please help me in learning and achieving my task. If any reference deign in VHDL language or any step by step guide is there then please share with me.
Thanks in advance,
Shruti
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Similarly, I am doing such a job recently. I seems that you should follow the megacore function userguide which would teach you to use these rx and tx fifo signals, control signals, clock and reset signals etc. It supports RGMII.
My work is using tse's PCS and PMA function, that is 1000BASE-X/SGMII PCS function with an embedded PMA. But I encounted a problem. It seems that the link between SFP and FPGA has not been established.
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