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Altera_Forum
Honored Contributor
Honored ContributorTriple speed ethernet IP core don't receive the RGMII data?
I use the triple speed ethernet IP core with an external PHY Device, the first picture is shown as my test block diagram . Transmiting part works normally, however, There is no data on the avalon-ST ...
Altera_ForumHonored Contributor
Honored ContributorSince your error is 4-bits wide, and since RGMII is a 4-bit wide DDR bus, I think you need to look closer there.
Is the problem something simple like you didn't add the timing constraints for the 2nd port? Double check for timing violations anyway.
