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Do you perhaps have a pin assignment or board defect with your 2nd MAC and 2nd PHY ?
Assuming that your 2nd diagram that is incorrect, and that you have correctly implemented bidirectional buffer, I think your experiment should have worked. You can investigate further by using something like TCPDUMP/WireShark on each PC to confirm that PC2 is actually receiving anything (and that it matches what PC1 transmitted). But overall from your problem description, it sounds like the packet is getting corrupted/dropped on the 2nd RGMII or PHY. If I'm not mistaken, it sounds like you have never seen anything operate correctly on the 2nd port.
You can further dig into it with SignalTap (tap both sides of both MAC), but I think that would be possibly more time consuming to discover you have an underlying hardware problem. And if you are software inclined, I would suggest implementing the standard NIOS ethernet design and "Simple Socket Server" as a debug tool on just the 2nd MAC/PHY until it is working correctly.
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Thank you for your reply.
I am sure pin assignment and board is correct, so the hardware problem should be eliminated. With my 2nd diagram, I really have implemented bidirectional buffer, but it don't still work. There is a limiting condition that PC2 in my experiment must not be install tools like WireShark. The internal loopback function of MAC IP core also be verified successfully, it indicates MAC works normally.
I guess the packet is getting corrupted on the transmitting path from MAC2 to 2nd port, through the packet can be output of 2nd port, but the receive side don't recognize it. If so, I am confused what caused this corruption, and how to localize the source of the problem?
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