Altera_Forum
Honored Contributor
13 years agoTrace System Megacore Function Synthesis Error
I am trying to tap a working video design that captures live video from a CCD camera and displays it on the lcd. As, Quartus v12 provides IPs for tapping avalon-ST data i.e. avalon-ST video monitor and trace system megacore functions so i used them. BUT when when I synthesize my new design, it generates following error:
--- Quote Start --- Error (10228): Verilog HDL error at altera_avalon_st_pipeline_base.v(22): module "altera_avalon_st_pipeline_base" cannot be declared more than once --- Quote End --- As far as i get it, module name "altera_avalon_st_pipeline_base" is getting repeated within the project but the path for "altera_avalon_st_pipeline_base.v" is --- Quote Start --- project directory\trace_system_1\ altera_jtag_dc_streaming\altera_avalon_st_pipeline_base.v --- Quote End --- ...which indicates that error lies in trace system megacore generated files. does anybody have a clue how to fix this???