timing questions -false path for the experts

--- Quote Start ---

@100Mhz

if(a=1 and config_reg(sel)) then

...

"a" and "sel" are at 100Mhz, and config_reg is 25Mhz, granting not to change.

--- Quote End ---

Ok so reg(a) is clocked by 100MHz, so is reg(sel) but conf_reg is clocked by 25MHz.

path 1) The path from conf_reg can be made false, but not the one (to) conf_reg, and

path 2) provided the path on clock 100MHz from (a) to next register is given enough time to settle since (a) output could change anytime an may violate clock 100MHz.

If you are not sure insert two registers on clock 100MHz just before (a) register.