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Altera_Forum's avatar
Altera_Forum
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8 years ago

timing questions -false path for the experts

Hi, I have a design that has value in it that define the code behavior, let call them: config_reg table_of_vaule 1. because of the nature of those things, they are deep in the design. ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
8 years ago

If you mean conf_reg is constant then that is not a timing path to reg (a).

Now if reg (a) is on slow clk you are sampling a constant (no problem) and (a) will acquire new value. If this is passed to fast clock then this path from (a) must be allowed to settle.

You need to explain clocks used in your request of a <= conf_reg