Forum Discussion
Altera_Forum
Honored Contributor
16 years agoI've now checked your MDL file and I can confirm that the MDL file has this problem as well. (To see the bit widths click the "Format" menu, follow "Port/Signal Displays" and select "Port Data Types".
Your IIR_Block subsystem has inputs of type SBF_1_18, which means 1 bit left of the binary point and 18 points to the right. Its output has type SBF_4436_4608, which you then reduce down to a 16 bit integer. The problem mostly seems to stem from you using Inferred as the Bus Type. The inferral seems quite wrong. For Gain_1, you have INT_16 (bitwidth 16) X SBF_1_18 (bitwidth 19) = SBF_32_36 (bitwidth 68), when it should be SBF_17_18 (bitwidth 35). As a short term fix I would try not using "Inferred", but manually inputting the width.