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Honored Contributor
Honored ContributorSuppress every third clock pulse
I have a need for a 150 MHz clock that has every third clock high period suppressed, looking as 101000101000 or 101100101100. Is it safe to use the basic 150MHz clock to drive a counter, decode an ou...
Altera_ForumHonored Contributor
Honored ContributorI will follow your suggestion. Practical: the main clocked component in my design, apart from several registers, is a dual port ram (altsyncram) of 512x32 bit. It has the option of a clock enable input. Would this signal do what I want, ignore one clock period on both a and b ports and maintain stable outputs from the previous clock?
