Forum Discussion
Altera_Forum
Honored Contributor
17 years agoYes, having combinatorial logic act as a clock is prone to spikes. Go through a altclkctrl block(which you always go through to get onto a global) and then disable the clock. The design in the attached link does the same thing, although it's for a different reason(basically disabling every other clock to make a divided down clock):
http://www.alteraforum.com/forum/showthread.php?t=1473&highlight=divide+clocks Good luck with timing analysis. Everything will be analyzed by the tighter setup requirements(which makes sense), so you would have to add a multicycle to the paths you want analyzed slower. (For the record, I'm still not sure what you're doing. Feeding logic with a clock like that will always have the logic run at the faster rate for a cycle, then at the slower rate for a cycle. So you still have to meet the faster timing. If you use an enable to disable some of the logic during the faster clock periods, then just do that and don't muck with the clock. My guess is that what you're trying to do could be accomplished better a different way, but again, I don't know the details...)