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Altera_Forum
Honored Contributor
Honored ContributorStuck while building the VIP Example Design
We are trying to get the vip_example_design_3c120_v81_revc up and running on an Cyclone III EP3C120F780 Dev Kit. It is an427.pdf. I am getting stuck in the Analysis & Elaboration with the follo...
Altera_ForumHonored Contributor
Honored ContributorIt appears this error occurs if the user executing the Quartus II IDE does not have Administrator permissions.
Is it Altera's position that all FPGA developers have Administrator access? (to the local machine, not the domain) If not, what sub-permissions must the developer account be granted in order to successfully compile?
