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Altera_Forum
Honored Contributor
14 years agoStritix IV + DDR3 controller write unstable
ENV: stritix IV + altmemphy DDR3 controller. DDR write is sometimes unstable. I used signaltap to observe signals of local bus. I perform 2 experiments as the following. 1.When I...
Altera_Forum
Honored Contributor
14 years ago>You sure the hardware is OK?
yes, I think hardware is OK. I use the following S4 Tai logic module. please google "S4 TAI Logic Module" I cannot post links right now. >All terminations are fine? Hardware terminations or pin setting ? >Is this happening, when tested on development kit ? Not on development kit, it's on my code. I used signaltap to observe signals of local bus. the signals satisfied the protocol.