Forum Discussion
Altera_Forum
Honored Contributor
13 years agoStream to Memory sgdma problem
I am having two problems with the sg-dma in my system. My first issue is that the sg-dma ready signal goes low after the first element of streaming data, then returns high on the third. This causes...
Altera_Forum
Honored Contributor
13 years agoI'm wondering if it makes more sense to stream the data directly into SDRAM and avoid having the additional on-chip RAM and DMA in your design. if you are worried about overflow then just place a ST FIFO in between the streaming source and the ST->MM SGDMA. From a programming perspective that would be a lot easier to manage since it's just a single DMA to coordinate.