Stratix V Native Phy PMA Direct

Hello,

I want to use Stratix V Transceiver Native Phy Ip core on PMA Direct mode width 32 bits.

I generated core, and created a model on Modelsim.

Core data bus provides 32 bits.

What should I do with this data?

Following standard 802.3 clause 49, I have to collect blocks of 66 bits and allocate "sync header".

Is it correctly for this Altera comonent?