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The Stratix-III DSP kit contains 2 ADCs, 125MSPS and controlled using seperate clocks. I was thinking if it is possible to clock the ADCs 180 degrees out of phase with each other and double the sampling rate.
In other words, I would use a Minicircuits splitter to split one signal and feed it to each ADC. After sampling, I would reconstitute the signals.
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Have you tested the analog response of the individual ADCs? You'll want to do that first. You'd need to check that the board does not have an anti-aliasing filter built in (it probably doesn't, the Stratix II kit didn't). There's no point in doubling the clock rate if the ADC input bandwidth is only 60MHz.
At the end of this document is some testing I did on the SII DSP kit.
http://www.ovro.caltech.edu/~dwh/correlator/pdf/lfsr_tutorial.pdf Cheers,
Dave
Honored Contributor
