Strange SoPC Address Clash

Hi Jake,

No, I have no bridges. I have two masters, though. I have seen this from more than one VIP core. It seemd as if it happens with cores that have options that, if selected, would increase the address space. The core seems to require its maximum address space, irrespective of whether it is actually required. I would have accepted this if SoPC Builder reserved the maximum address space from the start, but it does not - it seems to only reserve the address space required by the current selected compile time options, but when you generate the system, somewhere, the full address range is again applied.

Since you mentioned the clocked video input core, I might as well ask you about some weird behaviour I have seen from its registers. I read the Stable Video bit in the status register to see when stable video is being input. The first time I supply video, it works correctly, but it remains set. Even if I remove the video. I cannot seem to get this bit cleared once it is set. Am I missing something here? It is pretty useless if it indicates Stable Video with no video source connected! It would have made sense to make it a "sticky" bit so that the other status registers remain valid and stable while it is '1', and then once it is cleared, the video is again detected.

Thanks (sorry for the subject change!)

Regards,

Niki