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Altera_Forum's avatar
Altera_Forum
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15 years ago

SPI doesn't work at all

Hi, I need collect data from PIC18F4550 by SPI connection. The PIC is the Master running with Polarity = 0 and Phase = 1. The FPGA uses Altera IP SPI (3 wires Serial). All wires [SCK, MIS...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

I notice, that are writing SDO and reading SDI after SCK rising edge, which correspondends to no usual SPI mode. I don't see, which SPI mode is implemented in the FPGA, but I guess that it doesn't match the master's behaviour, which would explain well the erratic result.

P.S.: If you intend SPI mode 0, you have to set SDO before the rising clock edge.