Source of errors in data from SGDMA

Hi Daixiwen,

I created an SDC for the graphics project and this worked well with the exception of a couple of read errors which derailed the program.

You must be correct about Quartus meeting constraints at 70Mhz with no phase shift as to resolve this I removed the phase shift and instead extended the minimum input delay to account for my board which probably has a poorer performance than the Altera documentions standard estimate of 0.5ns assumes.

Once I added this slight delay the problems were resolved, confirmed with some lengthy memory tests. The display is now working perfectly.

Thank you again for all your help.

Sebastian