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Altera_Forum's avatar
Altera_Forum
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14 years ago

Some problem to integrate HDL Import block in Advanced design

Hi everyone, Im facing a nasty problem, im trying to use the HDL Import block in an Advanced design. I have followed both the instructions about how to interface Standard and Advanced blockse...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

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No if anything it should be:

Simulink Input, In blocks (IO&bus), HDL Import -> HDL Input -> GPin, <datapath> , GPout -> HDL Output -> Out blocks (IO&bus) , Scope

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Cool, thanks!! That works perfectly!!

I have just a curiosity how is Simulink able to run his functional simulation by using the HDL Import? I mean how is it able to interpret the VHDL code?